73 lines
2.1 KiB
Rust
73 lines
2.1 KiB
Rust
use cortex_m::prelude::{_embedded_hal_blocking_i2c_Write, _embedded_hal_blocking_i2c_WriteRead};
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use crate::CodecPins;
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use crate::hal::prelude::*;
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use crate::traits::Dac;
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const AK4490_I2C_ADDRESS: u8 = 0x10;
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#[repr(u8)]
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#[allow(dead_code)]
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enum RegisterAddress {
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Control1 = 0x00,
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Control2 = 0x01,
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Control3 = 0x02,
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LeftAtt = 0x03,
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RightAtt = 0x04,
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Control4 = 0x05,
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Control5 = 0x06,
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Control6 = 0x07,
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Control7 = 0x08,
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Control8 = 0x09,
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}
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pub struct Ak4490Dac<T> {
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i2c: T,
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pins: CodecPins, // this dependency is unfortunate, but non trivial to generalize
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}
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impl<T> Ak4490Dac<T>
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where
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T: _embedded_hal_blocking_i2c_WriteRead + _embedded_hal_blocking_i2c_Write,
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{
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#[inline]
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fn write_reg(&mut self, reg: RegisterAddress, val: u8) {
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self.i2c.write(AK4490_I2C_ADDRESS, &[reg as u8, val]).ok();
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}
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fn dfs_for_rate(&self, rate: u32) -> u8 {
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match rate {
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r if r < 54000 => 0,
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r if r < 108000 => 1,
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r if r < 216000 => 2,
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r if r <= 384000 => 4,
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_ => 5,
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}
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}
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}
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impl<T> Dac<T> for Ak4490Dac<T>
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where
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T: _embedded_hal_blocking_i2c_WriteRead + _embedded_hal_blocking_i2c_Write,
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{
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fn new(i2c: T, pins: CodecPins) -> Self {
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Self { i2c, pins }
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}
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fn init(&mut self) {
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// bring out of reset
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self.pins.reset.set_high();
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self.write_reg(RegisterAddress::Control1, (1 << 7) | 0x0e | (1 << 0)); // ACKS | I2S-32 | RSTN
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let dfs = 0; // start in 48k mode, change_rate will be called after init
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self.write_reg(RegisterAddress::Control2, 0x22 | ((dfs & 0x3) << 3));
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self.write_reg(RegisterAddress::Control4, (dfs & 0x4) >> 1);
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}
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fn change_rate(&mut self, new_rate: u32) {
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let dfs = self.dfs_for_rate(new_rate);
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self.write_reg(RegisterAddress::Control2, 0x22 | ((dfs & 0x3) << 3));
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self.write_reg(RegisterAddress::Control4, (dfs & 0x4) >> 1);
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}
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fn set_volume(&mut self, left: u8, right: u8) {
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self.write_reg(RegisterAddress::LeftAtt, left);
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self.write_reg(RegisterAddress::RightAtt, right);
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}
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}
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