49 lines
1.3 KiB
Rust
49 lines
1.3 KiB
Rust
use cortex_m::prelude::{_embedded_hal_blocking_i2c_Write, _embedded_hal_blocking_i2c_WriteRead};
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use defmt::warn;
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use crate::hal::prelude::*;
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use crate::{CodecPins, MCLK_FREQ, SAMPLE_RATE, SampleType};
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const AK4490_I2C_ADDRESS: u8 = 0x10;
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#[repr(u8)]
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enum RegisterAddress {
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Control1 = 0x00,
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Control2 = 0x01,
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Control3 = 0x02,
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LeftAtt = 0x03,
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RightAtt = 0x04,
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Control4 = 0x05,
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Control5 = 0x06,
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Control6 = 0x07,
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Control7 = 0x08,
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Control8 = 0x09,
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}
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#[inline]
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fn write_reg<T>(i2c: &mut T, reg: RegisterAddress, val: u8)
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where
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T: _embedded_hal_blocking_i2c_WriteRead + _embedded_hal_blocking_i2c_Write,
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{
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i2c.write(AK4490_I2C_ADDRESS, &[reg as u8, val]).ok();
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}
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pub(crate) fn init_dac<T>(i2c: &mut T, mut pins: CodecPins)
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where
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T: _embedded_hal_blocking_i2c_WriteRead + _embedded_hal_blocking_i2c_Write,
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{
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// bring out of reset
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pins.reset.set_high();
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write_reg(i2c, RegisterAddress::Control1, (1 << 7) | 0x0e | (1 << 0)); // ACKS | I2S-32 | RSTN
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let dfs = match SAMPLE_RATE {
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r if r < 54000 => 0,
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r if r < 108000 => 1,
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r if r < 216000 => 2,
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r if r <= 384000 => 4,
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_ => 5,
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};
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// default = 0x22
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write_reg(i2c, RegisterAddress::Control2, 0x22 | ((dfs & 0x3) << 3));
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write_reg(i2c, RegisterAddress::Control4, (dfs & 0x4) >> 1);
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}
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