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3db5e8bf7b
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add control loops diagrams
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2025-11-18 00:00:34 -08:00 |
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c03dbf4bef
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add intel programming tools
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2025-11-11 21:06:43 -08:00 |
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d127cea1d9
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fixes and updates
* Fix TCXO output filter - add dc-block and correct loading network
* Fix SPI EEPROM routing - cross DI/DO instead of connecting straight
* Add pull ups/downs on SPI lines
* Change EEPROM package to USON-8 4x3mm to make space for PU/PD
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2025-11-04 23:37:44 -08:00 |
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375e4b15b2
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rev1 fab outputs
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2025-11-04 23:37:44 -08:00 |
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e7f92f7a22
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paste jig
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2025-11-04 23:37:43 -08:00 |
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48a55c9b42
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replace 1.27mm headers with Molex PicoBlade
pigtails more readily available
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2025-11-04 23:37:36 -08:00 |
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28adc259b5
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likely going to fab
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2025-10-19 19:40:10 -07:00 |
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ffc74fd4b9
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initial commit, minipcie version
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2025-05-31 17:19:19 -07:00 |
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